JTAG Technologies Webinar
Testing (and more) using core emulation

Webinar: JTAG testing (and more) using core emulation

JTAG testing is synonymous with boundary-scan (IEEE Std 1149.1). However not all devices with a JTAG port support boundary-scan and some that do have restricted access to some signal pins, and what about access to analog functions such as built- in ADC and DAC in today's micros? This webinar discusses how JTAG Technologies CoreCommander functions can be used to exploit the micro's core (e.g. ARM, TriCore, MIPs...) power for board-level testing and more.


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JTAG testing (and more) using core emulation

15th of October 2020, 10:30 - 11:15 (CEST)

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About JTAG boundary-scan

In this age of miniaturization both design and production engineers need all the help they can get to ensure PCB assemblies are built reliably and repeatably. One technology that has been proven to improve build quality, reliability and time to market is JTAG/boundary-scan. Yet, remarkably some engineers still know little about the extent of it's capabilities. If you have ever wondered about JTAG/boundary-scan, what it is and how it can help you in your work, JTAG Technologies offer several opportunities to learn more. Our forthcoming series of autumn Webinars offer the ideal introduction into this powerful and versatile technology that is already built into many of today's designs.
To see all webinars about JTAG boundary scan, visit our event page [click here].