Testing the Design

According to a former research, 90% of PCBs contain at least one structural error after implantation. 

COMMON PCB ISSUES:

• CPU/FPGA reset
• FPGA Configuration Problem
• Memory troubles
• Burnt vias
• PCB Delamination
• Burnt PCB

You can avoid these issues if you are testing your PCB before the manufacturing phase.

If you’ve ever been involved in RF design, high-speed design, low current design, or all of these areas combined, you know the importance of maintaining signal integrity in your PCB. 

If you’re worried about signal integrity in your next PCB design, you need simulation and analysis tools that work within a unified design environment. The PDN Analyzer in Altium Designer can help you diagnose and correct your signal integrity issues and much more.

PDN Analyzer

PDN Analyzer is a CST (Computer Simulation Technology) based Altium Designer extension application. It helps you visually understanding the power delivery.

KEY FEATURES:

• Voltage drop simulation
• Current density identification
• Simultaneous multi-network simulation

Testing the Board

After manufacturing the PCB, the following testing options are available:

You can create different visual views from the PCB and automate the evaluation of these to detect each error. You can use a normal camera system (like AOI) or even X-ray to get the picture you want.

In addition, physical and electrical contact can be made with the PCB and its individual points, and we can examine the presence and operation of the components (whether analog or digital signals).

You can do Boundary Scan testing with a pencil, but you can also connect to the parts via the JTAG connector without using a needle pad. In standard Boundary Scan mode, you can verify assembly or program components, and emulate your memory, for example, or use built-in instruments integrated into the components.

And finally, it's a strategy that almost everyone is using: functional testing, whereby we test the functionality of a product by defining different boundary conditions.

Boundary Scan

WHAT IS BOUNDARY SCAN?

(JTAG) Boundary Scan a method of testing modern Printed Circuit Boards (PCBs) after assembly. Using the dedicated test logic built into many of today’s integrated circuits (ICs), boundary-scan checks if each device is correctly inserted and soldered onto the PCB. Boundary scan is also widely used as a debugging method to watch integrated circuit pin states, measure voltage, or analyze sub-blocks inside an integrated circuit.
Typical devices that incorporate boundary-scan technology include CPLDs, FPGAs, microprocessors, DSPs, ASICs, bus logic, SERDES, telecom encoders, PHYs and Bridges (PCI/PCIe).

A number of device manufacturers embracing boundary-scan technology are Intel, Analog Devices, ARM, Freescale, NXP, PLX, ST, TI, Renesas, Xilinx, Altera, Lattice, Broadcom and Actel among others.